New in version 6.20.0
February 19th, 2014
- Added support for XSAVEC and CLFLUSHOPT.
- Disabled TSX CPUID bits when TSX emulation is not requested.
- Improved disassembly for MPX instructions.
- Added an option for running chip-check only on the main executable.
- Added support for -quark (Pentium ISA).
- Added application debugging for Mac OSX with the lldb debugger.
New in version 6.12.0 (December 3rd, 2013)
- Added support to Mac OSX version 10.9.
- Improved the TSX statistics information.
- Various fixes with the emulation of floating-point instructions of Intel AVX-512.
- Enabled the alignment checker tool by default for instructions that require alignment.
- Fixed mismatch between mix and dynamic mask profiler.
- Updated the Intel MPX runtime libraries for Windows.
- Performance improvements when modeling a CPU prior to AVX-512.
New in version 6.1.0 (July 25th, 2013)
- Emulation support for the Intel®Advanced Vector Extensions 512 (Intel® AVX-512) instructions present on the Intel Knights Landing microarchitecture.
- Emulation support for the Intel® Secure Hash Algorithm (Intel® SHA) extensions present on the Intel Goldmont microarchtiecture.
- Emulation support for the Intel® Memory Protection Extensions (Intel® MPX) present on the Intel Skylake and Goldmont microarchitectures.
- Support for Hardware Lock Elision introduced on the Intel Haswell microarchitecture
- Improved support for Restricted Transactional Memory introduced on the Intel Haswell microarchitecture.
- Improved support for the OS X* operating system (Mountain Lion)
New in version 5.38 (January 5th, 2013)
- Improvements in RTM emulation stability. Added statistics knobs. Updated knobs.
- Support for debugging integration with Microsoft Visual Studio 2012. See main page for information.
- Improved multithreaded stability when using the AVX/SSE transition checker
- Mac OS X: support for code-signed binaries, simplifying execution. See main page for information about the "taskport".
- XED: added elf/dwarf support back to the command line tool
- TZCNT ZF flags fix
New in version 5.31 (December 5th, 2012)
- Major update including fixes for the processor codenamed Haswell and introduction of instructions in the processor codenamed Broadwell
- First public SDE release for OS X, 10.6 and 10.7. See additional information on the main Intel SDE web page for required permissions.
- HSW's RTM mode is supported with the "-rtm-mode full" option. This feature is very new and the Intel SDE implementation might be a little unstable.
- Completely new mechanism for handling of CPUID. CPUID values now come from an input file.
- SDE's -chip-check feature checks to make sure instructions are valid for the specified chip. See "sde -help" for the various chip options.
- Exception handling fixes
- Haswell BMI emulation fixes, including flags output.
- Debugtrace multithreading safety improvements
- Mix top-blocks sorting issues. Mix also has better support for allocating stats to overlapping blocks.
- Mix default blocks size is now 1500 instructions to avoid fragmenting large hot blocks.
- XED now can emit "dot" graphs for specified regions: path-to-sde-kit/xed -i SOMEEXE -as 0x40316b -ae 0x4031b3 -dot foo.dot; dot -O -Tpdf foo.dot
- Mix has prefix a legacy-prefix histogram
- Footprint tool can now collect stats about unique memory pages as well as unique cache lines. The footprint tool is now faster as well.
- Improved speed of AVX/SSE transition checker by roughly 12%. See the -ast knob in "sde -thelp".
- Fixed some numerical errors in our software emulation of the FMA instruction for denormal numbers.
- Various stability improvements from using a newer version of Pin.
- Better handling of MXCSR exception status bigs for AVX1/2 instructions. We still do not support raising unmasked floating point errors from emulated instructions.
- Can now set environment variables from the command line with the -env VAR VALUE option.
- The commands for the GDB interface have been updated. See "monitor help sde" when attached as described on the main page. Please use GDB 7.4 or later.
- The chip check error message includes the instruction bytes of the offending instruction.
- Multiprocess output file handling. You used to have to supply "-i" to get the process id inserted in to the file name to avoid multiprocess applications from overwriting the common output files. Now we attempt to detect the creating of other processes and add the PID to the file names automatically. The parent / child relationship is recorded in the file name.
- Better support for unused bits in the VEX encodings in 32b mode.
New in version 4.46 (December 19th, 2011)
- Linux 3.x is supported
- Better support for running on AVX-enabled hosts
- All output files now begin "sde-" and end with ".txt" by default
- Mix is faster and does more analysis of SIMD operations
- Mix has line number support for the top blocks when the information is available in the application
- The -ptr-chk option now checks the memory refernces of gather operations
- Fixed support for file descriptor leak when exec'ing thousands of threads on Linux.
- Misc other stability improvements.
New in version 4.29 (July 3rd, 2011)
- Support for Haswell New Instructions.
New in version 3.88 (December 23rd, 2010)
- Support for the POST-32NM processor instructions in the 008 revision of the Intel(R) AVX programmers reference document.
- Many stability improvements.
- The output of "sde -thelp" goes to stdout, not stderr.
- The mix tool has a "-demangle 0" option to turn off demangling.
- The xed disassembler handles uninitialized code sections in Windows binaries.
- Xed supports dwarf line number information with the -line knob on Linux.
- Mix has improved memory efficiency.
New in version 1.70 (January 31st, 2009)
- This release adds VPCLMULQDQ, the AVX version of PCLMULQDQ.